TESDD5V0HC bi-directional esd protection diode small signal diode ? meet iec61000-4-4 (eft) rating. 40a (5/50 ?s) ? protects one birectional i/o line ? working voltage : 5v ? case : sod-523f flat lead small outline plastic package min max min max 0.70 0.90 0.028 0.035 1.50 1.70 0.059 0.067 0.25 0.35 0.010 0.014 1.10 1.30 0.043 0.051 0.60 0.70 0.024 0.028 0.10 0.14 0.004 0.006 pin configutation ? microprocessor based equipment ? personal digital assistants (pda?s) ? portable instrumentation suggested pad layout ? peripherals part no. package packing marking TESDD5V0HC sod-523f 3k / 7" reel tb maximum ratings and electrical characteristics maximum ratings electrical characteristics 1ma 5v 1a 5a 6 100 15 8 mechanical data -1 5 10 1 pf w c v v kv units v ua applications ? cell phone handsets and accessories ? weight :2 mg (approximately) - symbol value . -55 to + 150 . min symbol v esd p pp - max ? terminal: matte tin plated, lead free., solderable per mil-std-202, method 208 guaranteed ? meet iec61000-4-2 (esd) 15kv (air), 8kv (contact) ? marking code : tb ? mounting position: any ? pb free version, rohs compliant, and halogen free junction and storage temperature range type number units packing code rkg rating at 25 c ambient temperature unless otherwise specified. esd per iec 61000-4-2 (air) esd per iec 61000-4-2 (contact) sod-523f 5 v rwm t j , t stg type number reverse stand-off voltage i pp = v r =0v, f=1.0mhz reverse leakage current features clamping voltage - c j i r v (br) i r = reverse breakdown voltag peak pulse power (tp=8/20 s waveform) ? high temperature soldering guaranteed: 260 c/10s c d e unit (inch) dimensions unit (mm) a b may vary despending on application. f ordering information 35 (typ.) notes: 1. the suggested land pattern dimensions have been provided for reference only, as actual pad layouts - vc junction capacitance i pp = v r = 0.40 0.40 1.80 1.00 unit : mm version : a 11
TESDD5V0HC bi-directional esd protection diode small signal diode rating and characteristic curves 0.01 0.1 1 10 0.1 1 10 100 100 0 peak pulse power ppp (kw) pulse duration (us) fig 2 pulse waveform 0 10 20 30 40 50 60 70 80 90 100 110 0 5 10 15 20 25 30 percent of i pp time (us) ambient tempeatature ( o c) reverse voltage (v) 0 5 10 15 20 25 012345 clamping voltage (v) fig 5 clamping voltage vs. peak pulse current) peak pulse current (a) waveform parameters: tr = 8 s, td = 20 s fig 1 non-repetitive peak pulse power vs. pulse time waveform parameters: tr = 8 s, td = 20 s fig 4 typical junction capacitance 0 5 10 15 20 25 30 35 40 012345 normalized capacitance fig 3 admissible power dissipation curve 0 20 40 60 80 100 120 0 20 40 60 80 100 120 140 160 180 power rating (%) f = 1.0mhz 1000 td=ipp/2 e -1 version : a11
TESDD5V0HC bi-directional esd protection diode small signal diode applications information ? designed to protect sensitive electronics from damage or latch-up due to esd ? designed to replace multilayer varistors (mlvs) in portable applications ? offers superior electrical characteristics such as lower clamping voltage and no device degradation when compared to mlvs circuit board layout recommendations tape & reel specification note 1: a 0 , b 0 , and k 0 are determined by component size. the clearance between the components and the cavity must be within 0.05 mm min. to 0.5 mm max. the component cannot rote more than 10o within the determined cavity. note 2: if b1 exceeds 4.2 mm(0.165'') for 8 mm embossed tape, the tape may not feed through all tape feeders. overall tape thickness t 0.6 max. tape width w 8.30 max. reel width w1 14.4 max. sprocke hole pitch p0 4.00 0.10 embossment center p1 2.00 0.10 sprocke hole position e 1.75 0.10 punch hole position f 3.50 0.05 reel inner diameter d1 50 min. feed hole width d2 13.0 0.5 sprocket hole d 1.50 +0.10 reel outside diameter a 178 1 item symbol dimension (mm) ? minimize the path length between the esd protection diode and the protected line. ? minimize all conductive loops including power and ground loops. ? designed to protect one data, i/o, or power supply line. ? the combination of small size and high esd surge capability makes them ideal for use in portable applications. good circuit board layout is critical for the suppression of esd induced transients. ? place the esd protection diode near the input terminals or connectors to restrict transient coupling. carrier depth k 2.40 max. ? the esd transient return path to ground should be kept as short as possible. top cover tape carieer tape any additional label (if required) tsc label direction of feed w1 d1 d2 a version : a11 for machine reference only including draft and radll concentric around b 0 t top cover tape see note1 b0 k center lines of cavity f e w for components 2.0mm x 1.2mm and larger d' d p1 10 pitches cumulative tolerance on tape 2.0mm ( 0.008") b 0 embossment a 0 k 0 b 1 p0
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